# title
Arm Cortex-M23 Devices Generic User Guide r1p0

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Arm Cortex-M23 Devices Generic User Guide

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About the Cortex-M23 processor and core peripherals

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Processor modes and privilege levels for software execution

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The Cortex Microcontroller Software Interface Standard

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Secure memory system and memory partitioning

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Programming hints for the synchronization primitives

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Accessing the Cortex-M23 NVIC registers using CMSIS

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The CMSIS mapping of the Cortex-M23 SCS registers

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Application Interrupt and Reset Control Register

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System Handler Control and State Register

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Security Attribution and Memory Protection

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Security Attribution Unit Control Register

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Security Attribution Unit Region Number Register

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Security Attribution Unit Region Base Address Register

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Security Attribution Unit Region Limit Address Register

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MPU Memory Attribute Indirection Register 0 and MPU Memory Attribute Indirection Register 1

# metadata.contentDescription
This book is a generic user guide for devices that implement the Cortex-M23 processor.