# title
CoreSight Technology System Design Guide

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CoreSight Technology System Design Guide

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Multi source trace in an single CPU system

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Multi source trace in a multi-core system

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Feedback of source ID and data duplication

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Features of CoreSight Technology and ETM Architectures

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About CoreSight Technology and ETM architectures features

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Architectural features of ARM trace sources

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Differences between on-chip and off-chip storage

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Calculating the number of trace port pins

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Calculating the size of on-chip RAM required

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Using additional buffers in trace systems

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Power for Trace Sources, ETM11CS, ETM9CS, and HTM

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Clocking in an power control enabled system

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CoreSight clocks and their inter-relationships

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Recommended ATB master interface timing parameters

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Recommended ATB slave interface timing parameters

# metadata.contentDescription
This is the System Design Guide for CoreSight Technology.