# title
ARM Cortex-R Series (Armv7-R) Programmer’s Guide

# topic.label
ARM Cortex-R Series (Armv7-R) Programmer’s Guide

# topic.topics[].topics[].label
Operating systems for Cortex-R processors

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Comparison with other assembly languages

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Floating-point basics and the IEEE-754 standard

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Example code for cache maintenance operations

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TCM Properties in the Cortex-R4 and Cortex-R5 processors

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TCM properties in the Cortex-R7 processor

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Implementing a Protected Memory System with Regions

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Permission modification in context switching

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Fault detection and control features in the Cortex-R4 processor

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ECC for the Cache RAM in the Cortex-R4 processor

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Parity for the TCM in the Cortex-R4 processor

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ECC for the TCMs in the Cortex-R4 processor

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Hard error banks in the Cortex-R4 processor

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Bus protection on the Cortex-R4 processor

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Redundant core in the Cortex-R4 processor

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Test of the fault detection and control features on the Cortex-R4 processor

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Fault detection and control features in the Cortex-R5 processor

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Parity in Cache RAM in the Cortex-R5 processor

# topic.topics[].topics[].topics[].label
ECC for the Cache RAM in the Cortex-R5 processor

# topic.topics[].topics[].topics[].label
ECC for the TCMs in the Cortex-R5 processor

# topic.topics[].topics[].topics[].label
Hard error banks in the Cortex-R5 processor

# topic.topics[].topics[].topics[].label
Bus protection on the Cortex-R5 processor

# topic.topics[].topics[].topics[].label
Redundant core in the Cortex-R5 processor

# topic.topics[].topics[].topics[].label
Test of the fault detection and control features on the Cortex-R5 processor

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Fault detection and control features in the Cortex-R7 processor

# topic.topics[].topics[].topics[].label
ECC for Cache RAMs in the Cortex-R7 processor

# topic.topics[].topics[].topics[].label
ECC for the TCMs on the Cortex-R7 processor

# topic.topics[].topics[].topics[].label
BTAC and PRED RAM in the Cortex-R7 processor

# topic.topics[].topics[].topics[].label
Hard error banks on the Cortex-R7 processor

# topic.topics[].topics[].topics[].label
Bus protection on the Cortex-R7 processor

# topic.topics[].topics[].topics[].label
Redundant core in the Cortex-R processors

# topic.topics[].topics[].topics[].label
Test of the fault detection and control features on the Cortex-R7 processor

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Debugging a multi-threaded applications using DS-5

# metadata.contentDescription
A guide for software developers programming Arm Cortex-R series processors based on the Armv7-R architecture.