# title
Arm Cortex-M System Design Kit Technical Reference Manual r1p1

# topic.label
Arm Cortex-M System Design Kit Technical Reference Manual

# topic.topics[].topics[].label
About the Cortex-M System Design Kit components

# topic.topics[].topics[].topics[].label
About the AHB to APB asynchronous bridge

# topic.topics[].topics[].topics[].label
Cross-clock domain handling in AHB to APB asynchronous bridge

# topic.topics[].topics[].topics[].label
About the AHB to AHB and APB asynchronous bridge

# topic.topics[].topics[].topics[].label
Handling of transfers initiated while master side is still in reset

# topic.topics[].topics[].topics[].label
External clock gating using the active signals

# topic.topics[].topics[].topics[].label
Synthesizing the AHB to AHB sync-down bridge

# topic.topics[].topics[].topics[].label
Overview of the AHB to AHB sync-up bridge

# topic.topics[].topics[].topics[].label
Synthesizing the AHB to AHB sync-up bridge

# topic.topics[].topics[].label
Behavioral SRAM model with AHB interface

# topic.topics[].topics[].label
About IP-XACT for the Cortex-M System Design Kit components

# topic.topics[].topics[].label
Location of the IP-XACT description files

# topic.topics[].label
Modification rights for supplied components

# metadata.contentDescription
This is the Technical Reference Manual (TRM) for the Cortex-M System Design Kit.