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ARM CoreLink MMU-400 System Memory Management Unit Technical Reference Manual r0p1

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ARM CoreLink MMU-400 System Memory Management Unit Technical Reference Manual

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Determining the security state of masters

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The MMU-400 security state determination address space summary

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Peripheral and Component identification registers summary

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Translation context bank registers summary

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Secure Alias to Non-secure Configuration Register 0

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Secure Alias to Non-secure Auxiliary Configuration Register

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Context Bank Fault Restricted Syndrome Register A

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Performance Monitor Event Count Register

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Performance Monitor Counter Group Configuration Register

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Performance Monitor Counter Group Stream Match Register

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Performance Monitor Device Type Register

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The MMU-400 Security State Determination Address Space

# metadata.contentDescription
This is the Technical Reference Manual (TRM) for the ARM CoreLink MMU-400 System Memory Management Unit.