# title
AMBA LPDDR2 Dynamic Memory Controller DMC-342 Technical Reference Manual r0p0

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AMBA LPDDR2 Dynamic Memory Controller DMC-342 Technical Reference Manual

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Product documentation, design flow, and architecture

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ARM architecture and protocol information

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ACTIVE to ACTIVE Different Bank Timing Register

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This is the Technical Reference Manual (TRM) for the AMBA LPDDR2 Dynamic Memory Controller (LPDDR2 DMC). The LPDDR2 DMC comprises various systems that you can render to support a single type and size of LPDDR2 SDRAM, or LPDDR SDRAM, on the memory interface.