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PrimeCell Generic Interrupt Controller (PL390) Technical Reference Manual r0p0

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PrimeCell Generic Interrupt Controller (PL390) Technical Reference Manual

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Product documentation, design flow, and architecture

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ARM architecture and protocol information

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Effect of updating the Priority Level Register for Active interrupts

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Interrupt prioritization of interrupts with equal priority

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Arbitration of SPIs which target multiple processors

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Initial value of the Interrupt Security Register

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Access restrictions of registers that are specific to a CPU Interface

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Minimum supported value in the Binary Point Register

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Interrupt Controller Type Register (ICDICTR)

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CPU Interface Implementer Identification Register (ICCIIDR)

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Software initialization process for GICs that support a single security state

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Software initialization process for GICs that support the Security Extensions

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Risk of Denial of Service (DoS) when the GIC supports the Security Extensions

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CPU Interface integration test registers

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AHB-Lite slave interface for the Distributor

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AHB-Lite slave interface for the CPU Interface

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Signaling interrupts when the GIC supports a single security state

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Signaling interrupts when the GIC supports the Security Extensions

# metadata.contentDescription
This is the TRM for the PrimeCell Generic Interrupt Controller (PL390). The Generic Interrupt Controller (GIC) is a configurable interrupt controller that supports uniprocessor or multiprocessor systems.