# title
Cortex-A9 Floating-Point Unit Technical Reference Manual r4p1

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Cortex-A9 Floating-Point Unit Technical Reference Manual

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IEEE 754 standard implementation choices

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Processor modes for accessing the FPU system registers

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Floating-Point Status and Control Register

# metadata.contentDescription
This is the Technical Reference Manual (TRM) for the Cortex-A9 Floating-Point Unit.