# title
Arm PrimeCell AHB DDR and NAND Memory Controller (PL244) Technical Reference Manual

# products[]
PL244 PrimeCell AHB DDR and NAND Memory Controller

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PrimeCell AHB DDR and NAND Memory Controller (PL244) Technical Reference Manual

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DMC Memory Controller Status Register at 0x0000

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DMC Memory Controller Command Register at 0x0004

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DMC Memory Configuration Register at 0x000C

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DMC Peripheral Identification Registers <0-3> at 0x0FE0-0x0FEC

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DMC PrimeCell Identification Registers <0-3> at 0xFF0-0xFFC

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SMC Memory Controller Status Register at 0x1000

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SMC Memory Interface Configuration Register at 0x1004

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SMC Set Configuration Register at 0x1008

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SMC Clear Configuration Register at 0x100C

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SMC NAND Cycles Registers <0-1> at 0x1100, 0x1120

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SMC User Configuration Register at 0x1204

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SMC Peripheral Identification Registers <0-3> at 0x1FE0-0x1FEC

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SMC PrimeCell Identification Registers <0-3> at 0x1FF0-0x1FFC

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DMC Integration Configuration Register at 0x0E00

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DMC Integration Inputs Register at 0x0E04

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DMC Integration Outputs Register at 0x0E08

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SMC Integration Configuration Register at 0x1E00

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SMC Integration Inputs Register at 0x1E04

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SMC Integration Outputs Register at 0x1E08

# metadata.contentDescription
This is the Technical Reference Manual (TRM) for the PrimeCell AHB DDR and NAND Memory Controller.