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AMBA AHB Trace Macrocell (HTM) Technical Reference Manual r0p4

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AMBA AHB Trace Macrocell (HTM) Technical Reference Manual

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About the CoreSight AHB Trace Macrocell (HTM)

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Boolean combinations for defining events

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External Trace Disable and Software Trace Disable

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Endianness support and bus width support

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HTM Configuration Code Register, HTMCFGCODE

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HTM Configuration Code 2 Register, HTMCFGCODE2

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HTM Trigger Status Register, HTMTRIGSTATE

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HTM Synchronization Counter Reload Register, HTMSYNCRELOAD

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HTM Synchronization Counter Value Register, HTMSYNCCOUNT

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HTM Trace Enable START STOP Register, HTMSTARTSTOP

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HTM TraceEnable Control 2 Register, HTMTCTRL2

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HTM TraceEnable Event Register, HTMTRACEEVT

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HTM TraceEnable Control Register, HTMTRACECTRL

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HTM Start/Stop Status Register, HTMSSTATE

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HTM Address Comparator Value Registers, HTMADDR0-15

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HTM Address Type Registers, HTMADDRTYPE0-15

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HTM AMBA Control Select Registers, HTMHCTRLSEL0-7

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HTM AMBA Control Compare Value Registers, HTMHCTRLVAL0-7

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HTM AMBA Control Compare Mask Registers, HTMHCTRLMASK0-7

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HTM Counter Reload Value Registers, HTMCNTRELDVAL0-3

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HTM Counter Enable Registers, HTMCNTENABLE0-3

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HTM Counter Reload Event Registers, HTMCNTRELDEVT0-3

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HTM Counter Value Registers, HTMCNTVALUE0-3

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HTM Sequencer Transition Event Registers, HTMSEQEVT0-5

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HTM Sequencer State Register, HTMSEQSTATE

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HTM External Output Event Registers, HTMEXTOUTEVT0-3

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HTM Claim Tag Set Register, HTMCLAIMTAGSET

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HTM Claim Tag Clear Register, HTMCLAIMTAGCLR

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HTM Lock Access Register, HTMLOCK_ACCESS

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HTM Lock Status Register, HTMLOCK_STATUS

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HTM Device CoreSight ID Register, HTMDEVID

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HTM ATB Device Type Register, HTMDEV_TYPE

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HTM Peripheral ID0 Register, HTMPERIPHID0

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HTM Peripheral ID1 Register, HTMPERIPHID1

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HTM Peripheral ID2 Register, HTMPERIPHID2

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HTM Peripheral ID3 Register, HTMPERIPHID3

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HTM Peripheral ID4 Register, HTMPERIPHID4

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HTM Peripheral ID5 Register, HTMPERIPHID5

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HTM Peripheral ID6 Register, HTMPERIPHID6

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HTM Peripheral ID7 Register, HTMPERIPHID7

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HTM Component ID0 Register, HTMCOMPONID0

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HTM Component ID1 Register, HTMCOMPONID1

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HTM Component ID2 Register, HTMCOMPONID2

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HTM Component ID3 Register, HTMCOMPONID3

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HTM typical burst but data is not traced

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Reset On/Off packets and TraceOff packet

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Cycle timing characteristics of ATB packets and signals

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Integration test for AHB and ATB connections

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ATB Control Integration Test Register 0, HTMITATBCTR0

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ATB Control Integration Test Register 1, HTMITATBCTR1

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ATB Control Integration Test Register 2, HTMITATBCTR2

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ATB Data Integration Test Register 0, HTMITATBDATA0

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Cycle Counter Test Register, HTMITCYCCOUNT

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External Trace Disable Integration Test Register, HTMITTRACEDIS

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Trigger Output Integration Test Register, HTMITTRIGGER

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Trigger Output Acknowledge Integration Test Register, HTMITTRIGOUTACK

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External Input Integration Test Register, HTMITEXTIN

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Power-down indication signals and clamping logic

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This is the TRM for the AMBA AHB Trace Macrocell (HTM). This book is intended to be read in conjunction with the AMBA AHB Specification (Rev 2.0), the CoreSight Architecture Specification, and the CoreSight System Design Guide.