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VFP9-S Vector Floating-point Coprocessor Technical Reference Manual r0p2

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VFP9-S Vector Floating-point Coprocessor Technical Reference Manual

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Maintaining consistency in register precision

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Data transfer between memory and VFP9-S registers

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Access to register banks in CDP operations

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An IEEE 754 standard-compliant implementation

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Complete implementation of the IEEE 754 standard

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IEEE 754 standard implementation choices

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VFP9-S system control and status registers

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Floating-point system ID register, FPSID

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Floating-point status and control register, FPSCR

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Instruction registers, FPINST and FPINST2

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Determination of the trigger instruction

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Exception processing for CDP scalar instructions

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Exception processing for CDP short vector instructions

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Examples of exception detection for short vector instructions

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Test pin configuration in scan test with wrapper

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Test pin configuration in functional mode

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Test pin configuration in external test wrapper mode

# metadata.contentDescription
This is the Technical Reference Manual (TRM) for the VFP9-S r0p2 coprocessor.