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The relationship between ARM and Thumb state registers

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Relocation of low virtual addresses by the FCSE PID

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Fault address and fault status registers

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Action of the ARM720T processor in debug state

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ARM720T processor device identification (ID) code register

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Examining the core and the system in debug state

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Programming and reading watchpoint registers

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Using the data, and address mask registers

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Breakpoint and watchpoint coupling example

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Enabling and disabling the ETM7 interface

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Connections between the ETM7 macrocell and the ARM720T processor

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Automatic Test Pattern Generation (ATPG)

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Embedded trace macrocell interface signals

# metadata.contentDescription
This document is a technical reference manual for the ARM720T r4p3 processor.