# title
ARM7TDMI Technical Reference Manual r4p1

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The relationship between ARM-state and Thumb-state registers

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If you are not using an external coprocessor

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Action of the ARM7TDMI processor in debug state

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Action of the ARM7TDMI core in monitor mode

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About the instruction cycle timing tables

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Coprocessor data transfer from memory to coprocessor

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Coprocessor data transfer from coprocessor to memory

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Coprocessor register transfer, load from coprocessor

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Coprocessor register transfer, store to coprocessor

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Undefined instructions and coprocessor absent

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ARM7TDMI core device IDentification (ID) code register

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Determining the core and system state in debug state

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Behavior of the program counter in debug state

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Programming and reading watchpoint registers

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Breakpoint and watchpoint coupling example

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Summary of differences between Rev 3a and Rev 4

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Detailed descriptions of differences between Rev 3a and Rev 4

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Improvement in Debug Communications Channel bandwidth

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Access to Debug Communications Channel through JTAG

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Alterations to TAP controller scan chain

# metadata.contentDescription
The Technical Reference Manual for the ARM7TDMI r4p1 processor.