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ARM PrimeCell Synchronous Serial Port (PL022) Technical Reference Manual

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ARM PrimeCell Synchronous Serial Port (PL022) Technical Reference Manual

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Texas Instruments synchronous serial interface features

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Texas Instruments synchronous serial frame format

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National Semiconductor Microwire frame format

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Examples of master and slave configurations

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Interrupt mask set or clear register, SSPIMSC

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Masked interrupt status register, SSPMIS

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Integration test input register, SSPITIP

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Integration test output register, SSPITOP

# metadata.contentDescription
The PrimeCell Synchronous Serial Port (SSP) is an Advanced Microcontroller Bus Architecture (AMBA) slave block that connects to the Advanced Peripheral Bus (APB). The PrimeCell SSP is an AMBA compliant System-on-Chip (SoC) peripheral that is developed, tested, and licensed by ARM.