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Register 3: Write buffer control register

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Register 5: Instruction and data space protection registers

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Register 6: Protection region base / size registers

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Register 9: Programming lockdown registers

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Instruction cache enable/disable and reset

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ARM940T device identification (ID) code register

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Instructions which may have the SYSSPEED bit set

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Instruction Cycle Summary and Interlocks

# metadata.contentDescription
This document is a reference manual for the ARM940T.