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Arm C1-DynamIQ Shared Unit MP200 Software Developer Errata Notice

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Arm® C1-DynamIQ™ Shared Unit MP200 Software Developer Errata Notice

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3628931 Interrupt outputs remain asserted from cluster after a core is in the OFF_EMU power mode

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3751605 Cache maintenance by set/way might operate on wrong L3 index

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3884239 Core in a complex transitioning to OFF or OFF_EMU might deadlock

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3281484 CTI trigger not connected to ELA in SME2 unit

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3396010 SCLK might be gated while SME2 unit traffic is in progress

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3414613 Reserved operating modes might cause deadlock

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3492937 PPU in static mode with core in FULL_RET might deadlock

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3679150 Power transition from FULL_RET to FUNC_RET during debug might deadlock

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3764687 Trace flush may not flush all data in transport

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3787679 Incorrect Aff0 field in DEVAFF registers

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3868399 DSU might not report data loss due to bus error

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3883509 Incorrect fields in MPAMF_IDR register

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3889236 APB access to core, SME2 unit, or cluster register might receive incorrect data

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3891767 DSU uses default MPAM value with wrong MPAMNS

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3908828 Incorrect field in PMDEVARCH register

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3918934 Incorrect Cluster CTIDEVAFF0 reserved value

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3997268 Generic timer counter values, and ETE and ELA timestamps are not accurate for core, complex, or SME2 unit

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4039371 Cache debug access during retention entry might deadlock

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4067292 PMU event SCU_HZD_ADDRESS might over-count

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4270323 CLUSTERPMU_PMOVSR not cleared on snapshot when CLUSTERPMU_PMSSRR is set

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4554239 PMU L3 allocate event might under-count

# metadata.contentDescription
This document outlines RTL-level errata that may affect software developers through observable system behavior.