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Arm C1-Scalable Matrix Extension 2 Technical Reference Manual

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Arm® C1-Scalable Matrix Extension 2 Technical Reference Manual

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Translation Lookaside Buffer entry content

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Memory behavior and supported memory types 

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AArch64 Generic System Control registers 

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Common performance monitoring unit events

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AArch64 Generic System Control registers summary

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IMP_CMEACTLR2_EL1, SME2 Auxiliary Control Register 2

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IMP_CMEREVIDR_EL1, SME2 unit ECO ID Register

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IMP_CABACTLR_EL1, CAB Auxiliary Control Register

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ERRSELR_EL1, Error Record Select Register

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ERXFR_EL1, Selected Error Record Feature Register

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ERXCTLR_EL1, Selected Error Record Control Register

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ERXSTATUS_EL1, Selected Error Record Primary Status Register

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ERXADDR_EL1, Selected Error Record Address Register

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ERXMISC0_EL1, Selected Error Record Miscellaneous Register 0

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ERXMISC1_EL1, Selected Error Record Miscellaneous Register 1

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ERXMISC2_EL1, Selected Error Record Miscellaneous Register 2

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ERXMISC3_EL1, Selected Error Record Miscellaneous Register 3

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AMEVCNTR00, Activity Monitors Event Counter Registers 0

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AMEVCNTR01, Activity Monitors Event Counter Registers 0

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AMEVCNTR02, Activity Monitors Event Counter Registers 0

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AMEVCNTR03, Activity Monitors Event Counter Registers 0

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AMEVCNTR10, Activity Monitors Event Counter Registers 1

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AMEVCNTR11, Activity Monitors Event Counter Registers 1

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AMEVCNTR12, Activity Monitors Event Counter Registers 1

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AMEVCNTR13, Activity Monitors Event Counter Registers 1

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AMEVTYPER00, Activity Monitors Event Type Registers 0

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AMEVTYPER01, Activity Monitors Event Type Registers 0

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AMEVTYPER02, Activity Monitors Event Type Registers 0

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AMEVTYPER03, Activity Monitors Event Type Registers 0

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AMEVTYPER10, Activity Monitors Event Type Registers 1

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AMEVTYPER11, Activity Monitors Event Type Registers 1

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AMEVTYPER12, Activity Monitors Event Type Registers 1

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AMEVTYPER13, Activity Monitors Event Type Registers 1

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AMCNTENSET0, Activity Monitors Count Enable Set Register 0

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AMCNTENSET1, Activity Monitors Count Enable Set Register 1

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AMCNTENCLR0, Activity Monitors Count Enable Clear Register 0

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AMCNTENCLR1, Activity Monitors Count Enable Clear Register 1

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AMCGCR, Activity Monitors Counter Group Configuration Register

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AMCFGR, Activity Monitors Configuration Register

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AMCR, Activity Monitors Control Register

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AMDEVAFF0, Activity Monitors Device Affinity Register 0

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AMDEVAFF1, Activity Monitors Device Affinity Register 1

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AMDEVARCH, Activity Monitors Device Architecture Register

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AMDEVTYPE, Activity Monitors Device Type Register

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AMPIDR4, Activity Monitors Peripheral Identification Register 4

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AMPIDR0, Activity Monitors Peripheral Identification Register 0

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AMPIDR1, Activity Monitors Peripheral Identification Register 1

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AMPIDR2, Activity Monitors Peripheral Identification Register 2

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AMPIDR3, Activity Monitors Peripheral Identification Register 3

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AMCIDR0, Activity Monitors Component Identification Register 0

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AMCIDR1, Activity Monitors Component Identification Register 1

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AMCIDR2, Activity Monitors Component Identification Register 2

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AMCIDR3, Activity Monitors Component Identification Register 3

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CMEPPMCR, Global PPM Configuration Register

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CMEMPMMCR, Global MPMM Configuration Register

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CMEMPMMTUNE, MPMM Tuning Configuration Register

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ERR0FR, Error Record <n> Feature Register

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ERR0CTLR, Error Record <n> Control Register

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ERR0STATUS, Error Record <n> Primary Status Register

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ERR0ADDR, Error Record <n> Address Register

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ERR0MISC0, Error Record <n> Miscellaneous Register 0

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ERR0MISC1, Error Record <n> Miscellaneous Register 1

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ERR0MISC2, Error Record <n> Miscellaneous Register 2

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ERR0MISC3, Error Record <n> Miscellaneous Register 3

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ERR0PFGF, Error Record <n> Pseudo-fault Generation Feature Register

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ERR0PFGCTL, Error Record <n> Pseudo-fault Generation Control Register

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ERR0PFGCDN, Error Record <n> Pseudo-fault Generation Countdown Register

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ERRPIDR4, Peripheral Identification Register 4

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ERRPIDR0, Peripheral Identification Register 0

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ERRPIDR1, Peripheral Identification Register 1

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ERRPIDR2, Peripheral Identification Register 2

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ERRPIDR3, Peripheral Identification Register 3

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ERRCIDR0, Component Identification Register 0

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ERRCIDR1, Component Identification Register 1

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ERRCIDR2, Component Identification Register 2

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ERRCIDR3, Component Identification Register 3

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PIDR4, Peripheral Identification Register 4

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PIDR0, Peripheral Identification Register 0

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PIDR1, Peripheral Identification Register 1

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PIDR2, Peripheral Identification Register 2

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PIDR3, Peripheral Identification Register 3

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CIDR0, Component Identification Register 0

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CIDR1, Component Identification Register 1

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CIDR2, Component Identification Register 2

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CIDR3, Component Identification Register 3

# metadata.contentDescription
This manual is for the C1-SME2 unit . It provides reference information and contains programming details for registers. It also describes the memory system, the interrupts, the debug features, and other key features of the C1-SME2 unit