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Arm Security Alarm Manager Specification

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Arm® Security Alarm Manager Specification

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Input clock domain crossing synchronizers and edge detectors

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AMBA APB3 subordinate programming port interface

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SAMRRLSn, Response Routing Logic register

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SAMECTIV, Event Counters Timer Initial Value register

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SAMWDCIV, Watchdog Counter Initial Value register

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SAMCDRES, Processor DCLS Reported Errors Status register

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SAMRRES0, Processor RAS Reported Error Status register

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SAMRRES1, Processor RAS Reported Error Status register

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SAMRRES2, Processor RAS Reported Error Status register

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VMPWCA<n>, Volatile Memory Partial Write Captured Address register

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VMSCEECA<n>, Volatile Memory Single Corrected ECC Error Captured Address register

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VMDUEECA<n>, Volatile Memory Double Uncorrected ECC Error Captured Address register

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TRAMSCEECA, TRAM Single Corrected ECC Error Captured Address register

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TRAMDUEECA, TRAM Double Uncorrected ECC Error Captured Address register

# metadata.contentDescription
The Security Alarm Manager (SAM) provides means to apply the programmed response to the detection of up to 64 security events.