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Introduction to the Armv8-M exception Model

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Compatibility between Armv6-M, Armv7-M, and Armv8-M architectures

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Classification of synchronous and asynchronous exceptions

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SCB registers for system exception management

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Interrupt Control and State Register (SCB->ICSR)

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Application Interrupt and Reset Control Register (SCB->AIRCR)

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System Handler Control and State Register (SCB->SHCSR)

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Fault status and fault address registers

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Programming MemManage using the CMSIS framework

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Programming BusFault using the CMSIS framework

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Programming UsageFault using the CMSIS framework

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Programming SecureFault using the CMSIS framework

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Faults triggered during the Exception handling process

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Using FAULTMASK in a configurable fault handler

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Using the SysTick timer for timing measurement

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Floating-point and MVE registers overview

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Floating-point Status and Control Register (FPSCR)

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Extended stack frame, automatic stacking

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Case 3: effect of group priority and sub-priority

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Triggering and handling of SVC exceptions

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Triggering and handling of the UsageFault

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Triggering SVC #0 as a deprivileging process