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Arm CoreLink GIC-720AE Generic Interrupt Controller Technical Reference Manual

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Arm® CoreLink™ GIC-720AE Generic Interrupt Controller Technical Reference Manual

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AMBA bus properties, GICD and CC subordinate interfaces

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AMBA bus properties, GICD manager interface

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Error recovery and fault handling interrupts

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ITS command and translation error records 27+

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GICD_TYPER, Interrupt Controller Type Register

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GICD_TYPER2, Interrupt Controller Type Register 2

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GICD_SAC, Secure Access Control register

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GICD_CCCGR, Cross-Chip Control Group Register

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GICD_CCCCR, Cross-Chip Control Credit Register

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GICD_FCTLR2, Function Control Register 2

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GICD_FCTLR3, Function Control Register 3

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GICD_VFCTLR, Virtual Function Control Register

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GICD_VCFGBASER, vICM Final vPE CFG Attribute Register

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GICD_ICERRRn, Interrupt Clear Error Registers

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GICD_ICGERRn, Interrupt Clear Group Error registers

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GICD_ISERRRn, Interrupt Set Error Registers

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GICD_ICLARnE, Interrupt Class Registers Extended

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GICD_ICERRRnE, Interrupt Clear Error Registers Extended

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GICD_ICGERRnE, Interrupt Clear Group Error registers Extended

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GICD_ISERRRnE, Interrupt Set Error Registers Extended

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GICD_ICVERRRn, Interrupt Clear View Error Registers

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GICD_ICVERRRnE, Interrupt Clear View Error Registers Extended

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GICD_IVIEWRnE, Interrupt View Registers Extended

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Distributor registers (GICM) for message-based SPIs summary

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Redistributor registers for control and physical LPIs summary

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GICR_WAKER, Power Management Control Register

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GICR_MPAMIDR, Report maximum PARTID and PMG Register

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GICR_PARTIDR, Set PARTID and PMG Register

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Redistributor registers for SGIs and PPIs summary

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GICR_ICDERRR, Interrupt Clear Distribution Error Register

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GICR_ICERRR0, Interrupt Clear Error Register 0

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GICR_ICERRR1E, Interrupt Clear Error Register Extended

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GICR_ISERRR0, Interrupt Set Error Register 0

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GICR_ISERRR1E, Interrupt Set Error Register Extended

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GICR_VFCTLR, Virtual Function Control Register

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GICR_VCFGBASER, vICM Final vPE CFG Attribute Register

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GICR_VINVCHIPR, vPE Invalidate Chip Register

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GITS_D_ERRINSR, Error Insertion Device cache register

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GITS_V_ERRINSR, Error Insertion Event cache register

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GITS_C_ERRINSR, Error Insertion Collection cache register

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GICT_ERR<n>FR, Error Record Feature Register

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GICT_ERR<n>CTLR, Error Record Control Register

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GICT_ERR<n>STATUS, Error Record Primary Status Register

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GICT_ERR<n>ADDR, Error Record Address Register

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GICT_ERR<n>MISC0, Error Record Miscellaneous Register 0

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GICT_ERR<n>MISC1, Error Record Miscellaneous Register 1

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GICT_ERRGSR, Error Group Status Register

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GICP_CNTENSET0, Counter Enable Set Register 0

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GICP_CNTENCLR0, Counter Enable Clear Register 0

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GICP_INTENSET0, Interrupt Contribution Enable Set Register 0

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GICP_INTENCLR0, Interrupt Contribution Enable Clear Register 0

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GICP_OVSCLR0, Overflow Status Clear Register 0

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GICP_OVSSET0, Overflow Status Set Register 0

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GICP_CAPR, Counter Shadow Value Capture Register

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FMU_ERR<n>FR, Error Record <n> Feature Register

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FMU_ERR<n>CTLR, Error Record <n> Control Register

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FMU_ERR<n>STATUS, Error Record <n> Primary Status register

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FMU_SMEN, Safety Mechanism Enable register

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FMU_SMERR, Safety Mechanism Inject Error register

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FMU_SMCR, Safety Mechanism Set Criticality Register

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FMU_SMWR, Safety Mechanism Page Write Register

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FMU_SMWDATA, Safety Mechanism Write Data register

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FMU_SMRD, Safety Mechanism Page Read Register

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FMU_SMRDATA, Safety Mechanism Read Data register

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PROTIDs reported for faults detected in LPD protection

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Enabling or disabling a protection mechanism

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Enabling or disabling both error signals on a block

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Discovering the active errors on a block

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Injecting an error in a protection mechanism

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Setting error recovery and fault handling options

# metadata.contentDescription
The GIC-720AE Technical Reference Manual provides information about the GIC-720AE functional behavior and its software programmable registers.