# title
Arm Neoverse N1 System Development Platform Technical Reference Manual Version 0.0

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Arm Neoverse N1 System Development Platform Technical Reference Manual

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Overview of configuration files and microSD card directory structure

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Overview of the N1 SDP MCC command-line interface

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Application Processor subsystem peripherals memory map

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Manageability Control Processor memory map

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Manageability Control Processor peripherals memory map

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System Control Processor peripherals memory map

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Manageability Control Processor interrupt map

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System Security Control registers summary

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Serial Configuration Control registers summary

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UART memory addresses and control registers

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This book is written for experienced hardware and software developers. It enables demonstration of coherent traffic between the N1 SoC and an accelerator daughterboard, and PCI Express Gen 4 development.