# title
Arm DynamIQ Shared Unit Technical Reference Manual r4p1

# topic.label
Arm® DynamIQ™ Shared Unit Technical Reference Manual

# topic.topics[].topics[].topics[].label
Interlocks between core and DSU P-Channels

# topic.topics[].topics[].topics[].label
Additional logic to support AXI compatibility

# topic.topics[].topics[].label
CLUSTERACPSID, Cluster ACP Scheme ID Register

# topic.topics[].topics[].label
CLUSTERACTLR, Cluster Auxiliary Control Register

# topic.topics[].topics[].label
CLUSTERBUSQOS, Cluster Bus QoS Control Register

# topic.topics[].topics[].label
CLUSTERECTLR, Cluster Extended Control Register

# topic.topics[].topics[].label
CLUSTERIDR, Cluster Main Revision ID Register

# topic.topics[].topics[].label
CLUSTERL3HIT, Cluster L3 Hit Counter Register

# topic.topics[].topics[].label
CLUSTERL3MISS, Cluster L3 Miss Counter Register

# topic.topics[].topics[].label
CLUSTERPWRCTLR, Cluster Power Control Register

# topic.topics[].topics[].label
CLUSTERPWRSTAT, Cluster Power Status Register

# topic.topics[].topics[].label
CLUSTERREVIDR, Cluster Revision ID Register

# topic.topics[].topics[].label
CLUSTERSTASHSID, Cluster Stash Scheme ID Register

# topic.topics[].topics[].label
CLUSTERTHREADSID, Cluster Thread Scheme ID Register

# topic.topics[].topics[].label
CLUSTERTHREADSIDOVR, Cluster Thread Scheme ID Override Register

# topic.topics[].topics[].label
ERR1MISC0, Error Record Miscellaneous Register 0

# topic.topics[].topics[].label
ERR1MISC1, Error Record Miscellaneous Register 1

# topic.topics[].topics[].label
ERR1PFGCDNR, Error Pseudo Fault Generation Count Down Register

# topic.topics[].topics[].label
ERR1PFGCTLR, Error Pseudo Fault Generation Control Register

# topic.topics[].topics[].label
ERR1PFGFR, Error Pseudo Fault Generation Feature Register

# topic.topics[].topics[].label
ERR1STATUS, Error Record Primary Status Register

# topic.topics[].topics[].label
CLUSTERPMCR, Cluster Performance Monitors Control Register

# topic.topics[].topics[].label
CLUSTERPMCNTENSET, Cluster Count Enable Set Register

# topic.topics[].topics[].label
CLUSTERPMCNTENCLR, Cluster Count Enable Clear Register

# topic.topics[].topics[].label
CLUSTERPMOVSSET, Cluster Overflow Flag Status Set Register

# topic.topics[].topics[].label
CLUSTERPMOVSCLR, Cluster Overflow Flag Status Clear Register

# topic.topics[].topics[].label
CLUSTERPMSELR, Cluster Event Counter Selection Register

# topic.topics[].topics[].label
CLUSTERPMINTENSET, Cluster Interrupt Enable Set Register

# topic.topics[].topics[].label
CLUSTERPMINTENCLR, Cluster Interrupt Enable Clear Register

# topic.topics[].topics[].label
CLUSTERPMCCNTR, Cluster Performance Monitors Cycle Counter

# topic.topics[].topics[].label
CLUSTERPMXEVTYPER, Cluster Selected Event Type Register

# topic.topics[].topics[].label
CLUSTERPMXEVCNTR, Cluster Selected Event Counter Register

# topic.topics[].topics[].label
CLUSTERPMMDCR, Cluster Monitor Debug Configuration Register

# topic.topics[].topics[].label
CLUSTERPMCEID0, Cluster Common Event Identification Register 0

# topic.topics[].topics[].label
CLUSTERPMCEID1, Cluster Common Event Identification Register 1

# topic.topics[].topics[].label
CLUSTERCLAIMSET, Cluster Claim Tag Set Register

# topic.topics[].topics[].label
CLUSTERCLAIMCLR, Cluster Claim Tag Clear Register

# topic.topics[].topics[].label
CLUSTERPMEVTYPER<n>, Cluster Event Type Register

# topic.topics[].topics[].topics[].label
Supported debug and trace trigger events

# topic.topics[].topics[].label
CTIPIDR0, CTI Peripheral Identification Register 0

# topic.topics[].topics[].label
CTIPIDR1, CTI Peripheral Identification Register 1

# topic.topics[].topics[].label
CTIPIDR2, CTI Peripheral Identification Register 2

# topic.topics[].topics[].label
CTIPIDR3, CTI Peripheral Identification Register 3

# topic.topics[].topics[].label
CTIPIDR4, CTI Peripheral Identification Register 4

# topic.topics[].topics[].label
CTIITCTRL, CTI Integration Mode Control Register

# topic.topics[].topics[].label
CTIDEVAFF0, Cluster CTI Device Affinity register 0

# topic.topics[].topics[].label
CTIDEVID, CTI Device Identification Register

# topic.topics[].topics[].topics[].topics[].label
Broadcast signals for the memory interface

# metadata.contentDescription
This Technical Reference Manual is for the DynamIQ Shared Unit (DSU). It describes the overall structure of the DSU including the main interfaces. It also describes power management, the memory system, caches, and the DebugBlock. Information on the programming registers is also provided.