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Arm Cortex-A55 Core Advanced SIMD and Floating-point Support Technical Reference Manual

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Arm® Cortex®-A55 Core Advanced SIMD and Floating-point Support Technical Reference Manual

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About the Advanced SIMD and floating-point support

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Accessing the AArch64 feature identification registers

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MVFR0_EL1, Media, and VFP Feature Register 0, EL1

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MVFR1_EL1, Media, and VFP Feature Register 1, EL1

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MVFR2_EL1, Media, and VFP Feature Register 2, EL1

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FPEXC32_EL2, Floating-point Exception Control Register, EL2

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Accessing the AArch32 feature identification registers

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FPSID, Floating-Point System ID Register

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FPSCR, Floating-Point Status and Control Register

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 MVFR2, Media and VFP Feature Register 2

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FPEXC, Floating-Point Exception Control register

# metadata.contentDescription
This book is for the Cortex-A55 core Advanced SIMD and floating-point support.